This invention relates generally to the detection and diagnosis of system failures, and, more particularly, to the optimization of a test sequence for the separate goals of failure screening and failure diagnosis.
An electronic system as used herein can take the form of a workstation, server, personal computer, an appliance or, broadly speaking, any other electronic equipment that incorporates a digital processing device or a programmable controller. Such systems generally include at least one central processing unit (CPU) that is used to execute software or firmware instructions to perform various functions. The CPU communicates with other devices in the computer system through an interconnection subsystem, commonly called a xe2x80x9cbus.xe2x80x9d For example, a bus can interconnect the CPU, directly or indirectly, to other devices, such as chip sets, graphic adapters, memory devices, and input/output (xe2x80x9cI/Oxe2x80x9d) devices, such as keyboards, monitors, scanners and printers. In the case of a programmable controlled the bus can connect the controller to the devices which it controls, such as relays, solenoids and actuators.
Conventionally, defects and errors in such computer systems are identified and isolated by running testing software on the system. System testing software has three similar but separate goals: screening, diagnosis and verification. Screening software is run during the manufacturing process and conducts a set of tests or sub-tests in a predetermined sequence in order to identify hardware defects which can be corrected before the product is shipped to the user. When a problem is detected, it is not usually repaired on the spot; instead, the defective unit is sent to a repair depot for correction of the detected problem. Consequently, the most important feature of such software is the ability to quickly screen each system. The average screening time can be lowered by finding and reporting the first error as quickly as possible. Consequently, screening tests are arranged so that sub-tests during which a failure is most likely to occur are run first in order to identify defective systems as soon as possible.
Diagnostic software is used to identify failures and provide a test technician with information necessary to isolate and repair a problem. This software may be used to detect a board that causes a failure during manufacturing and the repair might be at the component or etch level. The important feature of this software is the ability to isolate a problem and to provide enough debug information concerning the problem to enable a test technician to determine what has caused the failure so that the system can be repaired. Diagnostic software also consists of a set of sub-tests that are run in a predetermined sequence, but the optimal sequence of these tests differs from the test sequence used in screening software. In diagnostic testing, the sub-tests are run initially to test small portions of the hardware. The test coverage is then gradually increased until the entire system is tested. The test sequence is designed to isolate errors at the lowest level possible so that the cause of the errors is most easily understood.
Verification software is used to determine if a system is either defective or good. The most important feature of this software is not the diagnostic information or the speed of the test, but rather the coverage. Verification software is designed to detect all defects so that if a system passes this test, the system should be good.
Two approaches are currently used to combine these three functions. In the first approach, one test program is written to serve all three purposes. By definition, it is a diagnostic program because the program has to isolate errors. In order to do this it must test from the xe2x80x9cbottom upxe2x80x9d xe2x80x94initially testing small portions of the hardware and then gradually increasing coverage until the entire system is tested. Since the program must quickly isolate the first error, each item must be tested before using it as part of another test. This approach provides good isolation, but errors can occur any time in the test. Consequently, the average screening time is extended.
In the second approach, two testing programs are used, one for diagnosis as above and another for the screening. The screening test exercises the whole system as quickly as possible. If the two tests are separate programs, an attempt is made to insure that they attain total system coverage. Since there are two tests they are more expensive to develop. In addition, designing a screening test to have total coverage is as difficult as writing a diagnostic test and lack of coverage minimizes the usefulness of the test. Diagnostic tests can be designed to perform screening, but generally at the expense of time, a major screening goal. Often both tests are written and run as needed for applications. This is a compromise that ends up running both tests for total coverage and system verification.
It would be desirable to optimize the overall testing process both during screening and diagnostic testing by reducing the time to perform the testing as much as possible without sacrificing the debugging information necessary to perform repairs.
In accordance with one illustrative embodiment of the invention, testing is optimized by using the same set of sub-tests and varying the testing sequence to optimize performance for different purposes, such as screening and diagnostic testing. In particular, with one embodiment, in the diagnostic mode, the sub-tests are run so that each sub-test builds upon the previous sub-tests and uses previously-tested hardware to verify additional hardware. In the screening mode, the sub-tests are the same, but the execution order of the sub-tests is reversed so that more complex hardware is tested first as a screening mechanism.
In accordance with one embodiment, a programmable test sequencer in the electronic system responds to a test selection variable by using a first sequence of the sub-tests to optimize the testing process for screening and a second sequence of the sub-tests to optimize the testing process for diagnostic testing.
In another embodiment, the test selection variable is a value stored in a non-volatile memory in the electronic system. In another embodiment, a test selector responds to a test selection variable by selecting one of several separate test sequencers.
In accordance with yet another embodiment, the test selection variable is a xe2x80x9cmodexe2x80x9d pin located on the system hardware which can be manipulated, for example, by connecting the pin to ground potential or power potential in order to change the testing sequence.
In accordance with yet another embodiment, two different test sequencers are provided, one of which is enabled in response to the test selection variable.
In still another embodiment, several different test sequences can be used to optimize testing for several different circumstances.